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bipolar analog integrated circuit m pc8002 the m pc8002 is a monolithic ic developed for use in digital cordless telephones. its internal equivalent circuits comprise a double balanced mixer (dbm), if amplifier circuit, and rssi (received signal strength indicator) circuit. the m pc8002 can operate on a wide range of power supply voltages from 2.7 v to 5.5 v, and incorporates a power- off function, making it ideal for achieving low set power consumption. the package is a 20-pin plastic shrink sop (225 mil) suitable for high-density surface mounting. features ? low-voltage, low-consumption-current operation possible (v cc = 2.7 to 5.5 v, i cc = 3.4 ma at v cc = 3 v) ? wide mixer input frequency range (f mix = 250 mhz (typ.) to 500 mhz (max.)) ? wide if amplifier input frequency range (f if = 8 mhz (min.) to 12 mhz (max.), 10.7 mhz (typ.)) ? high limiting sensitivity (s l = C100 dbm (typ.)) ? wide rssi dynamic range (d r = 85 db (typ.)) ? on-chip power-off function ? use of 20-pin plastic shrink sop (225 mil) allows high-density surface mounting block diagram ordering information part number package m pc8002gr 20-pin plastic shrink sop (225 mil) m pc8002gr-e1 20-pin plastic shrink sop (225 mil) embossed carrier taping (pin 1 is tape unwinding direction) m pc8002gr-e2 20-pin plastic shrink sop (225 mil) embossed carrier taping (pin 1 is tape winding direction) bypass1 20 if2 out 11 if1 in 19 bypass2 18 if1 out 17 bypass4 16 if2 in 15 bypass3 14 gnd (if out) 13 v cc (if out) 12 1 10 23456789 pd rssi out mix out v cc (if) v cc (mix) lo in gnd(if) gnd(mix) mix in2 mix in1 if amp 1 power on/off rssi 2nd mixer rssi if amp 2 output stage second mixer + if amplifier for digital cordless telephones document no. s10717ej2v0ds00 (2nd edition) date published march 1997 n printed in japan the information in this document is subject to change without notice. 1997 data sheet
m pc8002 2 application circuit example 1 (using 2 bpfs) caution ensure that the pin voltage does not exceed the power supply voltage. remark the v cc pass capacitors (1 m f, 1000 pf) should be located close to the respective v cc pins. chip laminated ceramic capacitors (murata grm36 or equivalent) should be used. pd mix out v cc (if) v cc (mix) lo in gnd (if) gnd (mix) mix in1 mix in2 rssi out 1 f 1000 pf 1 f 1000 pf v cc 470 pf lo osc 1st mixer 470 pf 470 pf adc 20 19 18 17 16 15 14 13 12 11 bypass1 if1 in bypass2 if1 out bypass4 if2 in bypass3 gnd (if out) v cc (if out) if2 out 1000 pf bpf cfec10.7mk1 (murata) 1000 pf 0.01 f 0.01 f dem bpf cfec10.7mk1 (murata) v cc 1 f 1000 pf 1 2 3 4 5 6 7 8 9 10 v cc v cc m m m m m
m pc8002 3 application circuit example 2 (using 1 bpf) cautions 1. ensure that the pin voltage does not exceed the power supply voltage. 2. with this application circuit, confirm that there is not problem with interfering wave characteristics. remark the v cc pass capacitors (1 m f, 1000 pf) should be located close to the respective v cc pins. chip laminated ceramic capacitors (murata grm36 or equivalent) should be used. pd mix out v cc (if) v cc (mix) lo in gnd (if) gnd (mix) mix in1 mix in2 rssi out 1 f 1000 pf 1 f 1000 pf 470 pf lo osc 1st mixer 470 pf 470 pf adc 20 19 18 17 16 15 14 13 12 11 bypass1 if1 in bypass2 if1 out bypass4 if2 in bypass3 gnd (if out) v cc (if out) if2 out 1000 pf 1000 pf 0.01 f 0.01 f dem bpf cfec10.7mk1 (murata) 1 f 1000 pf 330 pf 1 2 3 4 5 6 7 8 9 10 v cc v cc v cc v cc m m m m m
m pc8002 4 application circuit example 3 (using 1 bpf) cautions 1. with this application circuit, good interfering wave characteristics are obtained with a single bpf. however, there is a drop in sensitivity. 2. ensure that the pin voltage does not exceed the power supply voltage. remark the v cc pass capacitors (1 m f, 1000 pf) should be located close to the respective v cc pins. chip laminated ceramic capacitors (murata grm36 or equivalent) should be used. pd mix out v cc (if) v cc (mix) lo in gnd (if) gnd (mix) mix in1 mix in2 rssi out 1 f 1000 pf 1 f 1000 pf v cc 470 pf lo osc 1st mixer 470 pf 470 pf adc 20 19 18 17 16 15 14 13 12 11 bypass1 if1 in bypass2 if1 out bypass4 if2 in bypass3 gnd (if out) v cc (if out) if2 out 1000 pf bpf cfec10.7mk1 (murata) 1000 pf 0.01 f 0.01 f dem v cc 1 f 1000 pf 1 2 3 4 5 6 7 8 9 10 v cc v cc 1000 pf 390 w m m m m m
m pc8002 5 cautions 1. with this application circuit, good interfering wave characteristics are obtained with a single bpf (and sensitivity is better than in application circuit example 3). 2. ensure that the pin voltage does not exceed the power supply voltage. remark the v cc pass capacitors (1 m f, 1000 pf) should be located close to the respective v cc pins. chip laminated ceramic capacitors (murata grm36 or equivalent) and a chip coil (murata lqhin or equivalent) should be used. application circuit example 4 (using 1 bpf) pd mix out v cc (if) v cc (mix) lo in gnd (if) gnd (mix) mix in1 mix in2 rssi out 1 f 1000 pf 1 f 1000 pf v cc 470 pf lo osc 1st mixer 470 pf 470 pf adc 20 19 18 17 16 15 14 13 12 11 bypass1 if1 in bypass2 if1 out bypass4 if2 in bypass3 gnd (if out) v cc (if out) if2 out 1000 pf bpf cfec10.7mk1 (murata) 1000 pf 0.01 f 0.01 f dem v cc 1 f 1000 pf 1 2 3 4 5 6 7 8 9 10 v cc v cc 1000 pf 390 w 1000 pf 150 pf 1.5 h m m m m m m
m pc8002 6 contents 1. pin configuration and pin functions .................................................................................... 7 2. input/output equivalent circuit diagrams ........................................................................ 9 3. electrical specifications .................................................................................................... ...10 4. characteristic diagrams ...................................................................................................... .. 13 5. level diagrams ............................................................................................................... .............. 17 6. test methods ................................................................................................................. ............... 18 7. test circuit examples ........................................................................................................ ....... 19 8. evaluation board mounting example ................................................................................. 25 9. wiring pattern capacitance diagram (reference) ........................................................ 28 10. package drawings ............................................................................................................ ........... 29 11. recommended soldering conditions .................................................................................. 30
m pc8002 7 1. pin configuration and pin functions (1) pin configuration (top view) ? 20-pin plastic shrink sop (225 mil) pin names bypass1-bypass4 : bypass gnd (if) : ground (intermediate frequency amp.) gnd (if out) : ground (intermediate frequency amp. output) gnd (mix) : ground (mixer) if1 in, if2 in : intermediate frequency amp. input if1 out, if2 out : intermediate frequency amp. output lo in : local input mix in1, mix in2 : mixer input mix out : mixer output pd : power down rssi out : received signal strength indicator output v cc (if) : power supply (intermediate frequency amp.) v cc (if out) : power supply (intermediate frequency amp. output) v cc (mix) : power supply (mixer) 1 2 3 4 5 6 7 8 9 10 pd mix out v cc (if) v cc (mix) lo in gnd (if) gnd (mix) mix in1 mix in2 rssi out 20 19 18 17 16 15 14 13 12 11 bypass1 if1 in bypass2 if1 out bypass4 if2 in bypass3 gnd (if out) v cc (if out) if2 out
m pc8002 8 (2) pin functions no. pin name i/o function 1 pd i power on/off control signal input 2 mix out o mixer output 3v cc (if) C if amplifier and rssi power supply pin 4v cc (mix) C mixer power supply pin 5 lo in i local input 6 gnd (if) C if amplifier and rssi ground pin 7 gnd (mix) C mixer ground pin 8 mix in1 i mixer input 9 mix in2 i filter capacitor connection 10 rssi out o rssi output 11 if2 out o if amplifier 2 output 12 v cc (if out) C if amplifier output stage power supply pin 13 gnd (if out) C if amplifier output stage ground pin 14 bypass3 C filter capacitor connection (if2 side) 15 if2 in i if amplifier 2 input 16 bypass4 C filter capacitor connection (if2 side) 17 if1 out o if amplifier 1 output 18 bypass2 C filter capacitor connection (if1 side) 19 if1 in i if amplifier 1 input 20 bypass1 C filter capacitor connection (if1 side)
m pc8002 9 2. input/output equivalent circuit diagrams mixer input local input if amplifier 1 input if amplifier 2 input power on/off input mixer output if amplifier 1 output if amplifier 2 output rssi output 8 1 k w 1 k w 9 276 w 2 700 a 207 w 17 250 a 11 290 a 32 k w 10 2 k w v cc 5 1 k w 1 k w 19 330 w 18 14.9 k w 20 330 w 14.9 k w 15 330 w 14 11.8 k w 16 330 w 11.8 k w 1 50 k w 150 k w m m m
m pc8002 10 3. electrical specifications absolute maximum ratings (t a = 25 c) parameter symbol test condition rating unit power supply voltage v cc 7v total power dissipation p t t a = 85 c 120 mw storage temperature t stg C40 to +125 c pin voltage v pin v cc +0.2 v caution product quality may suffer if the absolute rating is exceeded for any parameter, even momentarily. in other words, an absolute maximum rating is a value at which the possibility of physical damage to the product cannot be ruled out. care must therefore be taken to ensure that the these ratings are not exceeded during use of the product. recommended operating ratings (t a = 25 c) 0 dbm = 223.6 mv rms (at 50 w ) parameter symbol test condition min. typ. max. unit power supply voltage v cc 2.7 3.0 5.5 v operating ambient temperature t a C30 +25 +85 c mixer input level v mix 50 w resistance termination C98 C18 dbm lc matching (reference value) C107 C27 local input level v loc 50 w resistance termination C5 +5 dbm lc matching (reference value) C20 C10 if amplifier input level v if C99 C14 dbm mixer input frequency f mix 250 500 mhz mixer output frequency f om 8 10.7 12 mhz if amplifier input frequency f if 8 10.7 12 mhz rssi output load capacitance c oi 10 note pf if2 output load capacitance c or 10 note pf note includes all capacitances (board, pattern, etc.) applied to the pin.
m pc8002 11 electrical specifications (t a = 25 c, v cc = 3 v) (1) mixer section (f mix = 250 mhz, f loc = 239.3 mhz, v loc = C5 dbm) 0 dbm = 223.6 mv rms (at 50 w ) (where not specified in the test condition, input has 50 w termination) parameter symbol test condition min. typ. max. unit power supply current i ccm no signal 1.7 2.2 ma conversion gain g c 50 w resistance termination 4 8 11.0 db lc matching (reference value) 17.0 C1 db compression output level v om C14 C10 C7 dbm third order intercept point ip 3 stipulated by output note 1 C3 dbm noise factor nf 16 db lc matching (reference value) 7 db local separation i sl mixer non-input note 2 40 54 db mixer input impedance z inm 31-j156 w local input impedance z inl 31-j169 w output resistance r om 230 330 430 w power-on rise time t onm v po = 3 v note 3 815 m s power-off fall time t ofm v po = 0 v note 4 13 m s power-off power supply current i lm v po = 0 v 0 5 m a notes 1. f1 = 250.3 mhz, f2 = 250.6 mhz 2. leakage from local input to mixer output 3. time until the difference between the local input pin power-on and power-off voltages reaches 90 % power-on input voltage (v po ) rise time: 10 ns 4. time until the power supply current reaches 10 % of the power-on value power-on input voltage (v po ) fall time: 10 ns
m pc8002 12 (2) if amplifier section (f if = 10.7 mhz) 0 dbm = 223.6 mv rms (at 50 w ) parameter symbol test condition min. typ. max. unit power supply current i cci no signal 1.7 2.3 ma limiting sensitivity s l C3 db point C100 C97 dbm if amplifier phase fluctuation s p v if = C70 to C14 dbm note 1 10 deg if amplifier output amplitude v o if2 out, v if = C14 dbm 0.2 0.3 0.4 v p-p if amplifier output amplitude rise time t r if2 out, v if = C14 dbm 8 20 ns if amplifier output amplitude fall time t f if2 out, v if = C14 dbm 15 25 ns if amplifier input resistance r in if1 in, if2 in 230 330 430 w if amplifier input capacitance c in if1 in, if2 in 3.5 6.0 pf if amplifier output resistance r o if1 out 230 330 430 w rssi linearity l r v if = C94 to C14 dbm 2db rssi slope s r 18 20 22 mv/db rssi intercept i r C164.7 C148 C134.4 dbm rssi output voltage 1 v r1 v if = C14 dbm 2.58 2.68 2.78 v rssi output voltage 2 v r2 v if = C54 dbm 1.76 1.88 2.0 v rssi output voltage 3 v r3 v if = C94 dbm 0.88 1.08 1.28 v rssi output voltage 4 v r4 no signal 0.96 1.23 v rssi output temperature stability s t v if = C94 to C14 dbm note 2 2db rssi output dynamic range d r note 3 80 90 db rssi rise time t rf1 v if = C14 dbm note 4 1.0 4 m s rssi fall time t rf2 v if = C14 dbm note 4 1.6 4 m s rssi output ripple r r v if = C14 dbm 20 mv p-p rssi output resistance r or 25.6 32 38.4 k w power-on rise time t oni v po = 3 v, no signal note 5 510 m s power-off fall time t ofi v po = 0 v note 6 13 m s power-off power supply current i li v po = 0 v 6 10 m a notes 1. network analyzer rbw = 3 hz 2. t a = C30 c to +85 c 3. input level range for which drift from the regression expression with v if = C94 to C14 dbm is 2 db 4. time until the rssi output reaches the final value 10 % 5. time until the rssi output is within 10 % of the power-on value power-on input voltage (v po ) rise time: 10 ns 6. time until the power supply current reaches 10 % of the power-on value power-on input voltage (v po ) fall time: 10 ns (3) power-on/off section parameter symbol test condition min. typ. max. unit power-on input voltage v on power-on at v on or above, v cc or below 1.5 2.4 v power-off input voltage v of power-off at v of or below, gnd or above 0.6 1.2 v power-on input current i on v po = 3 v 40 60 m a
m pc8002 13 4. characteristic diagrams (1) power supply current vs power supply voltage (if amplifier section) (2) power supply current vs power supply voltage (mixer section) 4 3 2 1 0 01234567 power supply current [ma] [v] power supply voltage 5 0 01234567 power supply current [ma] [v] power supply voltage 1 4 2 3
m pc8002 14 (3) if amplifier output level vs if amplifier input level (4) if amplifier output phase vs if amplifier input level 0 _ 20 _ 10 _ 30 _ 120 _ 20 _ 100 _ 80 _ 60 _ 40 0 if amplifier output level [dbm] [dbm] if amplifier input level _ 3db limiting sensitivity 140 100 _ 70 _ 20 _ 60 _ 50 _ 40 _ 30 _ 10 input/output phase difference [deg] [dbm] if amplifier input level 120 130 110 phase fluctuation test input level range _ 14
m pc8002 15 (5) rssi characteristics (a) (6) rssi characteristics (b) 3 1.5 0 _ 120 _ 80 _ 40 _ 60 _ 100 0 rssi output voltage [v] [dbm] if amplifier input level 0.5 2.5 2 1 _ 20 regression line regression line 5 2 _ 5 _ 120 _ 80 _ 40 _ 60 _ 100 0 rssi error [db] [dbm] if amplifier input level 3 0 _ 20 _ 3 4 _ 4 _ 1 _ 2 1
m pc8002 16 (7) mixer output level vs mixer input level _ 70 _ 30 _ 40 _ 60 0 _ 10 _ 50 _ 20 50 w resistance termination mixer output level [dbm] [dbm] mixer input level 0 _ 10 _ 20 _ 30 _ 40 _ 50 _ 60 _ 70 _ 80
m pc8002 17 5. level diagrams (1) for application circuit 1 notes 1. 50 w resistance termination 2. lc matching (reference value) (2) for application circuit 2 mixer pc8002gr + 8 db note 1 + 17 db note 2 bpf _ 4 db if amp1 + 42 db bpf _ 4 db if amp2 + 66 db if out 0.3 v p-p _ 18 dbm note 1 _ 27 dbm note 2 _ 6.5 dbm _ 90 dbm _ 94 dbm _ 56 dbm 80 db _ 52 dbm _ 98 dbm note 1 _ 107 dbm note 2 _ 10 dbm _ 14 dbm 80 db _ 12 dbm _ 16 dbm m mixer pc8002gr + 8 db note 1 + 17 db note 2 330 pf if amp1 + 42 db bpf _ 4 db if amp2 + 66 db if out 0.3 v p-p _ 18 dbm note 1 _ 27 dbm note 2 _ 6.5 dbm _ 90 dbm _ 52 dbm 80 db _ 48 dbm _ 98 dbm note 1 _ 107 dbm note 2 _ 10 dbm _ 12 dbm _ 16 dbm 80 db m
m pc8002 18 6. test methods (1) mixer input section (a) with 50 w resistance termination (b) with 50 w lc matching note since the values of l and c are affected by the boards parasitic capacitance and inductance, l and c should be adjusted so that the impedance looking at the mix in pin side from the signal source is 50 w . (2) third order intercept 82 pf mix out 2 470 p mix in1 8 lo in 5 v mix 50 w 16.7 w 16.7 w 16.7 w f1 = 250.3 mhz f2 = 250.6 mhz 470 p 50 w f osc = 239.3 mhz mix in1 470 pf 50 w v mix mix in1 470 pf v mix c note l note 8 8
m pc8002 19 7. test circuit examples in test circuit example 2 onward, only the portion that differs from test circuit example 1 is shown. test circuit example 1. caution the 10 pf capacitor value for if2 out and rssi out includes all the capacitances (board, pattern, etc.) applied to the pin. ensure that the recommended load condition (10 pf) is not exceeded for if2 out and rssi out. remark chip laminated ceramic capacitors (murata grm36 or equivalent) should be used. pd mix out v cc (if) v cc (mix) lo in gnd (if) gnd (mix) mix in1 mix in2 rssi out v cc 82 pf 1 2 3 4 5 6 7 8 9 10 1 f 1000 pf 1 f 1000 pf 470 pf 50 w 470 pf 50 w 470 pf 10 pf 1000 pf bypass1 if1 in bypass2 if1 out bypass4 if2 in bypass3 gnd (if out) v cc (if out) if2 out 20 19 18 17 16 15 14 13 12 11 330 pf 50 w 1000 pf 0.01 f 0.01 f 1 f 1000 pf 10 k w bpf cfec10.7mk1 (murata) 10 pf v cc v cc v cc 1000 pf m m m m m
m pc8002 20 3 v cc (if) a v cc 1000 pf 12 v cc (if out) 1000 pf 1 f 4 v cc (mix) a 1000 pf 1 f v cc m m test circuit example 2. (power supply current, power-off power supply current) caution the 10 pf capacitor value for if2 out and rssi out includes all the capacitances (board, pattern, etc.) applied to the pin. ensure that the recommended load condition (10 pf) is not exceeded for if2 out and rssi out. test circuit example 3. (limiting sensitivity, if amplifier output amplitude, if amplifier output amplitude rise time, if amplifier output amplitude fall time, rssi linearity, rssi slope, rssi intercept, rssi output voltage, rssi temperature stability, rssi output ripple) 19 if1 in 10 rssi out 330 pf 50 w 10 pf digital voltmeter oscilloscope 11 if2 out 10 pf 10 k w spectrum analyzer oscilloscope sg (signal generator) 10.7 mhz 1000 pf
m pc8002 21 test circuit example 4. (if amplifier phase fluctuation) caution the 10 pf capacitor value for rssi out includes all the capacitances (board, pattern, etc) applied to the pin. caution the 10 pf capacitor value for if2 out includes all the capacitance (board, pattern, etc.) applied to the pin. ensure that the recommended load condition (10 pf) is not exceeded. test circuit example 5. (rssi rise time, rssi fall time) ... time until rssi output is within 10 % of the final value) 330 pf if1 in 17 if1 out 10 rssi out 10 pf for if2 input storage oscilloscope 2 15 if2 in for if1 input 50 w sg 10.7 mhz, _ 14 dbm storage oscilloscope 1 330 pf 50 w sg 10.7 mhz, _ 14 dbm input signal from sg 1 sec 50 sec 19 m 19 if1 in 50 w 330 pf network analyzer 11 if2 out 10 pf 10 k w attenuator 1000 pf
m pc8002 22 test circuit example 6. (power-on rise time) mixer section : time until the difference between the local input pin power-on and power-off voltage reaches 90 % if section : time until rssi output is within 10 % of the power-on value. 1 pd 10 rssi out 10 pf storage oscilloscope 2 lo in storage oscilloscope 1 5 input signal from sg 1 sec 50 sec sg 3 v 0 v m remark power-on input voltage (v po ) rise time: 10 ns caution the 10 pf capacitor value for rssi out includes all the capacitances (board, pattern, etc.) applied to the pin. ensure that the recommended load condition (10 pf) is not exceeded. test circuit example 7. (power-off fall time) 1 pd storage oscilloscope input signal from sg 1 sec 50 sec sg 12 v cc (if out) 3 v cc (if) current probe 4 v cc (mix) 3 v 0 v v cc v cc m
m pc8002 23 470 pf 5 lo in 50 w sg 239.3 mhz 2 mix out 82 pf spectrum analyzer 470 pf 8 mix in1 see 6. test methods (2) 470 pf 5 lo in 50 w sg 239.3 mhz 2 mix out 82 pf spectrum analyzer 470 pf 8 mix in1 sg 250 mhz see 6. test methods (1) test circuit example 8. (conversion gain, C1 db compression level) test circuit example 10. (local separation) test circuit example 9. (third order intercept output level) 470 pf 5 lo in 50 w sg 239.3 mhz 2 mix out 82 pf spectrum analyzer
m pc8002 24 470 pf lo in 50 w mix out 82 pf noise source 470 pf mix in1 see 6. test methods (1) nf meter 5 2 8 test circuit example 11. (power-on input voltage, power-off input voltage, power-on input current) test circuit example 12. (noise factor) 1 pd a v v cc
m pc8002 25 8. evaluation board mounting example c1 c2 c3 pc8002 plated wire c7 r1 if2 out c4 c5 c6 kc-8002gr 1 vcc 50 mm 70 mm m remark indicates a through-hole.
m pc8002 26 remark indicates a through-hole. if2 out bpf c10 c 9 c 10 c11 bpf c9 c 10 r3 l1 r4 c11 l2 local in mix in rssi out r2 c12 c 13 if1 in c 8 1 vcc mix out
m pc8002 27 c1 : 1 m f r1 : 10 k w c2 : 1000 pf r2 : 50 w c3 : 1000 pf r3 : 50 w c4 : 1 m f r4 : 50 w c5 : 1 m f l1 : 58 nh (reference value) c6 : 1000 pf l2 : 10 nh (reference value) c7 : 10 pf note c8 : 330 pf c9 : 0.01 m f c10 : 0.01 m f c11 : 470 pf c12 : 470 pf c13 : 10 pf note note for the if2 out and rssi out capacitance values, see 9. wiring pattern capacitance diagram (reference) . remarks 1. both l in the case of lc matching and r in the case of 50 w termination are connected to mix in. remove in the case of lc matching, and and in the case of 50 w termination. 2. change the location of the plated wires according to the evaluation items. 3. cut the wiring pattern to connect . r4 l1 l2 l2
m pc8002 28 9. wiring pattern capacitance diagram (reference) the wiring pattern capacitances to ground are shown here. for pin 11, the capacitance is 8.1 pf when the entire pattern (from pin 11 to point b) is used. in this case, the usable probe input capacitance is 1.9 pf (max.). from pin 11 up to point a, the capacitance is 1.4 pf, and therefore an 8.6 pf (max.) probe can be used. for pin 10, the capacitance is 4 pf when the entire pattern is used. rssi out pin 10 pin 11 0.9 pf 0.5 pf a 3.0 pf 0.8 pf if2 out 2.9 pf b
m pc8002 29 10. package drawings 20 pin plastic shrink sop (225mil) item millimeters inches a b c d e f g h i j 7.00 max. 0.65 (t.p.) 1.45 max. 1.15?.1 6.4?.2 0.575 max. k 0.10 1.0?.2 4.4?.1 0.15 m 0.22 0.1?.1 0.276 max. 0.023 max. 0.009 0.004?.004 0.057 max. 0.045 0.252?.008 0.173 0.039 0.006 0.004 0.026 (t.p.) p20gr-65-225c-1 p3? 3? +0.10 ?.05 20 detail of lead end f p c m m n l 11 110 a g e d b k h i j +0.004 ?.003 +0.005 ?.004 +0.005 ?.004 +0.009 ?.008 +0.10 ?.05 +0.004 ?.002 l 0.5?.2 0.020 +0.008 ?.009 0.10 n 0.004 +7? ?? +7? ?? note each lead centerline is located within 0.10 mm (0.004 inch) of its true position (t.p.) at maximum material condition.
m pc8002 30 11. recommended soldering conditions the following conditions ( see table below) must be met when soldering this product. for more details, refer to our document "semiconductor device mounting technology manual" (c10535e) . please consult with our sales offices in case other soldering process or condition is used. ir35-107-2 vp15-107-2 note exposure limit before soldering after dry-pack package is opened. storage conditions : 25 ?c and relative humidity at 65 % or less. caution do not apply more than one soldering method at any one time, except for " partial heating method". vps peak package's surface temperature: 235 ?c or below. reflow time : 30 seconds or below (210 ?c or higher), number of reflow processes : max.2 exposure limit note : 7 days (10 hours pre-baking is required at 125 ?c afterwards) peak package's temperature: 215 ?c or below. reflow time : 40 seconds or below (200 ?c or higher), number of reflow processes : max. 2 exposure limit note : 7 days (10 hours pre-baking is required at 125 ?c afterwards) terminal temperature : 300 ?c or below, time : 3 seconds or below (per side of pin position) type of surface mount device partial heating method infrared ray reflow m pc8002gr soldering process soldering conditions symbol
m pc8002 31 [memo]
m pc8002 32 the application circuits and their parameters are for references only and are not intended for use in actual design-in's. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96.5

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